The manufacture of semiconductor devices includes steps of providing various processes, such as oxidation, film deposition, and the like, to semiconductor wafers as objects to be processed. As the apparatus for performing these processes, there is employed a semiconductor manufacturing apparatus (also referred to as a vertical heat processing apparatus), for example, which is capable of processing a number of wafers in a batch mode (e.g., see Patent Document 1).
The semiconductor manufacturing apparatus includes: a transfer area including a transfer mechanism configured to transfer a FOUP (Front Opening Unify Pod, also referred to as a carrier), which serves as a container for containing a plurality of wafers, from a loading port (loading and unloading part) to a storage shelf part or a transport part and vice versa; a wafer counter (detection mechanism) configured to detach a detachable lid from a front part of the FOUP that has been loaded into the loading port, and to detect positions of wafers in the FOUP; a FOUP catcher (receiving and sending mechanism) configured to receive the FOUP from the transfer mechanism and to send the FOUP to the transport part; an elevating mechanism disposed in a loading area (working area) formed below a furnace opening of a heating furnace, the elevating mechanism being configured to support a boat (holder), which is capable of vertically holding a plurality of wafers at predetermined intervals, on a lid member for opening and closing the furnace opening, so as to load/unload the boat into/from the heating furnace; a door mechanism configured to open and close an opening formed in a partition wall separating the transfer area and the loading area, together with the lid of the FOUP on the transport part; and a notch aligner (aligning mechanism) configured to receive wafers from the loading area, and to align positions of marks such as notches (cut-outs) provided in the respective peripheries of the wafers.
These wafers are expensive, and thus the production cost will increase as the processing steps advance. Thus, the wafers should be handled with greater care.    [Patent Document 1] JP2000-150400A
However, in the aforementioned semiconductor manufacturing apparatus of a batch type, the construction of the apparatus poses various restrictions in terms of software and hardware, which makes it difficult for the apparatus to have an earthquake resistant construction or an earthquake-proof function. Thus, a sufficient countermeasure against earthquake has not been actually taken. Therefore, when an earthquake occurs and the apparatus experiences a greater shake, the apparatus may suffer various damages. Namely, the boat may fall over and be destroyed, wafers may be leaped out from the boat and broken, and/or a gas may be leaked. If the apparatus suffers such damage, it should take a longer time to make the apparatus recover for restart of the manufacture, which may further increase damage. In order to solve this problem, the Applicant of the present invention filed a method for limiting expansion of earthquake damage and a system for limiting expansion of earthquake damage for use in a semiconductor manufacturing apparatus (Japanese Patent Application No. 2007-208863 which is unpublished).
However, only the invention of the above patent application is insufficient for protecting the overall semiconductor manufacturing apparatus. For example, in the loading port and the transport part, the FOUP is sometimes being opened with its lid being detached therefrom. Under this state, when an earthquake occurs to roughly shake the apparatus, wafers may fly out of the FOUP and the wafers which have flown out of the FOUP may fall and break.
In addition, in a case where an earthquake occurs and the apparatus experiences a greater shake when the FOUP is being transferred by the transfer mechanism, the FOUP may fall over so that the wafers in the FOUP may break. Alternatively, when an earthquake occurs after the FOUP has been placed by the FOUP catcher onto the transport part, the FOUP may fall from the transport part so that the wafers in the FOUP may break.
In addition, in a case where an earthquake occurs when the boat is being unloaded from the heating furnace after the heating process, wafers may fly out of the boat, and the wafers may fall and break. When a wafer breaks into small pieces, and the pieces are then scattered in the loading area, the pieces may get caught in the respective driving parts.
The semiconductor manufacturing apparatus includes: a heater (heating apparatus) configured to heat the heating furnace to a high temperature; a pump system configured to evacuate the heating furnace, and to reduce a pressure therein; and a gas system configured to supply a process gas and an inert gas, which may be a dangerous gas, into the heating furnace. Thus, in order to limit expansion of earthquake damage including human injury, both the ensuring of safety and the early recovery are desired to be achieved at the same time.